arm: Tidy up flush_xen_dcache().
authorTim Deegan <tim@xen.org>
Fri, 23 Nov 2012 11:06:14 +0000 (11:06 +0000)
committerTim Deegan <tim@xen.org>
Fri, 23 Nov 2012 11:06:14 +0000 (11:06 +0000)
commitb1f2c77ffda88e16665078e3cf5b8fd20647d1e5
tree382e15698180d0310afc174d91f912e27f2329eb
parent18cd92eed4d68421ecaf55469b1d00b641582d0d
arm: Tidy up flush_xen_dcache().

 - Use a compile-time-constant check for whether we can safely flush
   just one cacheline.  This reduces the common case from 28
   instructions to three.
 - Pass an object to the macro, not a pointer, so we can detect
   attempts to flush arrays.
 - Decode CCSIDR correctly to get cacheline size.
 - Remove some redundant DSBs at the call sites.

Signed-off-by: Tim Deegan <tim@xen.org>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Committed-by: Ian Campbell <ian.campbell@citrix.com>
xen/arch/arm/mm.c
xen/arch/arm/setup.c
xen/arch/arm/smpboot.c
xen/include/asm-arm/page.h
xen/include/xen/compiler.h